A typical example of the delay circuit is formed by combination of a capacitor and a resistor with a time constant of CR, however the above circuit arrangement of the delay circuit is not suitable for an integrated circuit fabricated on a semiconductor substrate. This is because of the fact that the combination with a large time constant CR consumes a large amount of real estate on the semiconductor substrate and, for this reason, the integrated circuit is decreased in integration density.
Another known delay circuit is formed by a binary counter circuit supplied with a clock signal and the binary counter circuit serves as a frequency divider circuit. However, the binary counter circuit is usually constructed by a plurality of flip-flop circuits coupled in cascade so that a large number of component transistors are needed to form the binary counter circuit. This results in that a large amount of real estate is consumed to form the delay circuit. Moreover, the flip-flop circuits with a large number of transistors consume a large amount of current, then the delay circuit formed by the binary counter circuit is also undesirable for an integrated circuit fabricated on a semiconductor substrate.